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Solution for micro- and nanoelectronics

Production of the hardware components of modern computing, telecommunication, and navigation systems is the key priority of microelectronics. Electronic functional units, blocks, and devices are developed in the micro-miniature integrated form. Dimensions of the required elements of hardware components lie within the order of micrometres, hundreds, tens, and units of nanometres.

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ZEISS Axio Imager Light Microscope

ZEISS Axio Imager Light Microscope

ZEISS Axio Imager Vario Light Microscope

ZEISS Axio Imager Vario Light Microscope

Raith EBPG5150 Electron Beam Lithography System

Raith EBPG5150 Electron Beam Lithography System

Raith EBPG5200 Electron Beam Lithography System

Raith EBPG5200 Electron Beam Lithography System

Raith VOYAGER Electron Beam Lithography system

Raith VOYAGER Electron Beam Lithography system

Such devices are usually made based on semiconductors and semiconducting compounds, and also some dielectric materials through photolithography and electron-beam lithography (EBL). Nanolithography is exposure with a nanometre-order formed or focused Gaussian electron beam, which allows for (1) development of all chip components without dimensional restrictions, and (2) serial production of nanometre-order structural elements (hundreds to tens of nanometres).


Nanoelectronics is the field concerning development and production of integrated circuits with characteristic dimensions lower than 100 nm. Such technologies are used for creation of computing microprocessors, memory modules, microwave devices, infrared devices, semiconductor-based radiative devices and photodetectors, solar battery components, and power electronics. As a result of development of processor transistors, the critical size of silicon transistors decreased from 10 µm (late 1960s) to 28–22 nm (2011–2012). There are standard technologies in nanoelectronics that are directly linked to the critical size of key structural components: so called «technology node» 90 nm, 65 nm, 40–45 nm, 32–28 nm, 22–20 nm, 16–14 nm, 10 nm, 7 nm, 5 nm. In 2014, the 14-nm node was developed, and Intel released processors based on this node in April of 2015. Standards belong to the major CMOS integrated circuit production flow. CMOS is the technology that employs field transistor as the main circuit component.

Critical size in the technology node equals the half-node (half the distance between structures in the identical element array), which fundamentally determines performance of the entire device (e.g. memory module). Alternatively, critical size can be determined for the field transistor gate, which also fundamentally affects microprocessor productivity, as the critical size of the gate allows for the lowest possible stray capacitance and highest possible switch speed. Critical size allowances lie within the order of several nanometres. With that, chips are produced on silicon plates (100–300 mm or 450 mm in diametre).

Наноэлектроника 2

Such high-scale serial production requires a dedicated plant for each technology node. Critical sizes are implemented through projection photolithography (stepper) with the use of Deep UV with excimer laser and immersion. Cost of constructing a dedicated plant accounts for several billion US dollars (for instance, 14-nm project Fab42 costs more than USD 5B). Technology development and lower-scale serial production involve nanolithography, with Raith EBPG as the key element ensuring high reproducibility of results on plate of up to 200 mm, process automation and high speed, minimal feature size of 8 nm, and flexibility in exposure chip elements of various size.

EBL is agile, as structures are designed without the need for photomasks (in contrast to photolithography). Direct exposure of CAD-format vector features enables adjusting the node when needed. This approach is required in technology development and for enabling fast production of a small series. EBL is also flexible in multilayer lithography, precise alignment by marking with simpler nodes of UV lithography, where EBL allows for creating only critical-size features. During technology prove-out, EBL allows for creating high-profile photomasks.

Разработка сверхвысокочастотных интегральных схем
Разработка сверхвысокочастотных интегральных схем

Development of super-high frequency integrated circuits for broadband wireless connection systems, optical-fiber carriers, radars, high-sensitivity radiometres, is the ultra-relevant field today.

One of key objectives of engineering super-high frequency devices and extremely-high frequency electronics is development of field HEMTs (high electron mobility transistors), and PHEMTs (psuedomorphic high electron mobility transistors) and MHEMTs (metamorphic high electron mobility transistors). These transistors enable high signal amplification and low noise at high frequencies, which is essential for any communication device working in microwave or millimetre-wave lengths. Development is based on semiconductors А3B5 (GaAs, InP) on same-name substrates and wide-gap semiconductors GaN/AlGaN on sapphire or silicone carbide substrates.

The key critical feature of these transistors is so-called T-shape gate. Max transistor frequency is inversely proportional to the gate length. Frequences 100–1,000 GHz are reached at the gate length lower than 100 nm. To date, the technology is successfully advancing in proportion to decrease of the gate length to 30 nm and 20 nm. Such features are developed and implemented with the use of EBL and precise alignment with lithography, and specifics of multilayer resist exposure. Nowadays, lithographers of RAITH 150TWO, VOYAGER and EBPG series are used to good advantage. Technologies of lithographs with acceleration voltage of 50 kV (VOYAGER) and 100 kV (EBPG) are of high concern, as they allow for high exposure accuracy at the relatively thick resist layer due to low beam dispersion.

In serial production, EBL is only used for engineering T-shape gate along the substrate, determining its size and precision of aligning thereof with other features of the transistor and integrated circuit. In particular, it is 4-5-nm precision is the essential of successful production of a functional microelectronic device. Experience of employing high-productivity EBPG systems: 1,000–2,000 substrates GaAs produced every year (per system), gate length up to 25 nm.

Микроэлектроника Микроэлектроника

Microelectronics (particularly, radioelectronics) are not limited to semiconductor devices only. To engineer mobile communication devices, radio-frequency identification marks, delay lines, filters, surface-acoustic-wave resonators and generator interdigitated transducers, together with Si3N4/Si-type substrates, such dielectrics as lithium niobate are applied.

Also, there are some objectives on engineering on-glass structures (e.g. analog encryption devices). Though features of such structures can be quite large (larger than several hundreds of nanometres), precision of features alignment and edge smoothness are crucial for these objectives. This is why EBL is a technology of high interest. With that, EBL performance must be high enough to ensure relevant time of engineering such structures.

While EBL, based on the formed beam, ensures maximum performance, Raith VOYAGER and Raith EBPG turn out to be more flexible, cost-efficient, allowing for the required fine accuracy and high, in most cases, exposure speed. The objective of exposing such features comes with certain difficulties as a substrate is not conductive and prevents leakage of stray charge during electron-beam exposure. To date, there are some advancements that employ a conductive polymeric layer and high-sensitivity resists, to allow for meeting the objectives with the required quality and efficiency.


Input quality control, safe use of electronic components/chips, and preservation of unique technologies (e.g. out-of-production spaceship integrated circuits) are crucial tasks in micro- and nanoelectronics. It is required to recognise the integral circuit/chip technology at the highest possible spatial resolution across large area, considering all features both across the area, and layer by layer. The result of such recognition will be CAD-format vector feature «extracted» from the studied chip.

Chip scanning ensures both the opportunity to thoroughly analyze a chip structure, and the opportunity to engineer a precise or modified analog. Feature sizes of the existing chips are so that such information can be retrieved only by using a high-accuracy cathode-ray scanning device which ensures high spatial resolution of the electron-beam imaging, no distortions or nonuniformities across the scanning field, and precise linking of scanning fields. One-of-a-kind devices Raith CHIPSCANNER 150TWO andRaith CHIPSCANNER 100 Plus have the required capabilities and, besides, professional software for transforming raster images into GDSII and other CAD formats, correction tools, filters, and other chip scanning support instruments.

Raith CHIPSCANNER has proven itself as a chip scanning standard in modern micro/nanoelectronics, used my major manufacturers. The system was dedicated to such applications, having, according to experts, no analogs that could demonstrate that high quality. As shown in the recent experiment of one chip scanning company, CHIPSCANNER 150TWO is capable of recognising 22-nm chips. With that, Raith CHIPSCANNER can be used for lithography on plates up to 150 mm in diameter, which makes sense in reproduction of scanned chips, as it ensures the full closed-loop reverse engineering cycle.



Low time effort of projects is due to stability and reproducibility of the sample/finished device preparation technique. Efficient technology prove-out is due to reproducibility of the EBL process and sample processing stability.

EBL reproducibility is ensured by the dedicated lithographer that differs from an ordinary electronic microscope by higher-stability electronic-optical column with aligned scanning, stabilised and fast-operation electronics, integrated stage with precision control with the use of the laser interferometer and integrated software.

Sample processing before and after the EBL also considerably affects the final result. In this context, it is appropriate to deploy the required lab equipment, in clean premises connected with the EBL system.

Example of recommended equipment:

1. Chemical fume hood / Laminar flow cabinet
1.1. for resist applying, drying, and development (laminar flow cabinet). For chemistry: Polymethylmethacrylate (anisole) and other resists, developers, isopropanol, acetone, deionised water, etc. — 1–2 units
1.2. for preparation (cleaning, flushing) of substrates/plates. (laminar flow cabinet). For chemistry: acetone, isopropanol, methanol, deionised water — 1–2 units
1.3. for post-processing (fume hood), for chemistry (alkalis and acids) — 1–2 units.
2) Centrifuge for resist applying (cabinets 1.1) — 1–2 sets
3) Temperature cell for resist drying/hardbaking at stable temperature not higher than 160 (250) °C (cabinets 1.1) — 1–2 sets
4) Device for resist development at stabilised temperature (-20 — +200 °C).
5) Substrate dehydration oven
6) Scriber. A separate fume hood is recommended (draft from below, hood on top)
7) Ultrasonic bath for acetone-dipping substrate cleaning
8) Plasma-etching system (oxygen plasma)
9) Upright optical microscope — quality control
10) Upright optical microscope with film thickness measurement capability
11) Optical stereomicroscope
12) Stylus profilograph
13) RIE/ICP plasma-chemical etching system (e.g. chlorine plasma)
14) RIE plasma-chemical etching system (e.g. fluorine plasma, argon plasma)
15) PECVD dielectric coating system
16) Vacuum sprayer/cathode-ray evaporator
17) Bonding system
18) Automated-thermal-emission scanning electronic microscope — quality control
(or two-beam work station FIB-SEM)
19) Separate fume hood for reagent storage (resists, developers, etc.)
20) Reagent fridge — 1–2 sets
21) HF acid etching system
22) Lab furniture set
23) Test tube drying cabinet
24) Nitrogenous hood for sample/substrate storage

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